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  1. /*
  2.  * @(#) wonder.xgi 5.3 91/09/30 
  3.  */
  4. /*
  5.  *    @(#) wonder.xgi 23.2 90/12/13 
  6.  *
  7.  *      Copyright (C) The Santa Cruz Operation, 1989.
  8.  *      This Module contains Proprietary Information of
  9.  *      The Santa Cruz Operation, and should be treated as Confidential.
  10.  *
  11.  *
  12.  *      Copyright (C) ATI Technologies Inc., 1990
  13.  */
  14.  
  15. /* *********************************************************************** *
  16.  * ATI/WONDER.XGI - XEGIA(tm) GrafInfo File for ATI VGAWONDER V3           *
  17.  *                                                  VGAWONDER V4           *
  18.  *                                                  VGAWONDER V5           *
  19.  *                        and Standard VGA       *
  20.  *                                                                         *
  21.  * LAST UPDATE : OCT 17, 1990  by ATI                                      *
  22.  * LAST UPDATE : DEC 13, 1990  by SCO                                      *
  23.  * - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - *
  24.  *                                                                         *
  25.  *   ATI.WONDER.VGA.640x350-16            STD VGA                          *
  26.  *   ATI.WONDER.VGA.640x480-16            STD VGA                          *
  27.  *   ATI.WONDER.ATIVGA.V5-800x600-16      Super VGA 800x600/16 56HZ        *
  28.  *   ATI.WONDER.ATIVGA.V4-800x600-16      Super VGA 800x600/16 56HZ        *
  29.  *   ATI.WONDER.ATIVGA.V3-800x600-16      Super VGA 800x600/16 56HZ        *
  30.  *                                                                         *
  31.  * *********************************************************************** */
  32.  
  33. VENDOR ATI         "ATI"
  34.  MODEL  WONDER     "VGA WONDER"
  35.   CLASS  VGA       "STD VGA"
  36.    MODE   640x350-16  "640x350 16-color"      /* STD VGA 640x350 16-color */
  37.  
  38.       MEMORY(0xA0000,0x10000);        /*  Base Address, Length        */
  39.       PORT(0x3C2,0x3CA,0x3CC,0x3DA);  /*  General/External registers  */
  40.       PORT(0x3C0,0x3C1);              /*  Attribute                   */
  41.       PORT(0x3C7,0x3C8,0x3C9);        /*  Color registers             */
  42.       PORT(0x3C4,0x3C5);              /*  Sequencer                   */
  43.       PORT(0x3CE,0x3CF);              /*  Graphics                    */
  44.       PORT(0x3D4,0x3D5);              /*  CRTC                        */
  45.  
  46.       DATA
  47.          {
  48.      XDRIVER     = "mw";
  49.      VISUAL      = "PseudoColor";
  50.      DEPTH       = 4;
  51.          DEVTYPE     = 01;
  52.          DEVTECH     = 0x0D;            /* VGA */
  53.          PIXBYTES    = 80;
  54.          PIXWIDTH    = 640;
  55.          PIXHEIGHT   = 350;
  56.          PIXRESX     = 68;
  57.          PIXRESY     = 50;
  58.          PIXBITS     = 1;
  59.          PIXPLANES   = 4;
  60.          MAPTYPE     = "EGA";
  61.          BASEADDRESS = 0xA0000;
  62.          INTERLEAVE  = 1;
  63.          INTERSIZE   = 80;
  64.          }
  65.  
  66.       PROCEDURE  SetGraphics
  67.          {
  68.          in(r63,0x3DA);                   /* reset attr F/F  */
  69.          out(0x3C0,0);                    /* disable palette */
  70.  
  71.          r0 = 1;  r1 = 1;  r2 = 0x0F;  r3 = 0;  r4 = 6;
  72.          bout(6,0x3C4,0x3C5);             /* reset, sequencer regs */
  73.  
  74.          out(0x3C2,0xA3);                 /* misc out reg */
  75.          r0=3; bout(1,0x3C4,0x3C5);        /* sequencer enable */
  76.  
  77.          out(0x3D4,0x11); out(0x3D5,0);   /* unprotect crtc regs 0-7 */
  78.          r0  = 0x5F;  r1  = 0x4F;  r2  = 0x50;  r3  = 0x82; /* crtc */
  79.          r4  = 0x54;  r5  = 0x80;  r6  = 0xBF;  r7  = 0x1F;
  80.          r8  = 0x00;  r9  = 0x40;  r10 = 0x00;  r11 = 0x00;
  81.          r12 = 0x00;  r13 = 0x00;  r14 = 0x00;  r15 = 0x00;
  82.          r16 = 0x83;  r17 = 0x85;  r18 = 0x5D;  r19 = 0x28;
  83.          r20 = 0x0F;  r21 = 0x63;  r22 = 0xBA;  r23 = 0xE3;
  84.          r24 = 0xFF;  bout(25,0x3D4,0x3D5);
  85.  
  86.          out(0x3CC,0x00); out(0x3CA,0x01); /* graphics controller */
  87.          r0  = 0x00;  r1  = 0x00;  r2  = 0x00;  r3  = 0x00;
  88.          r4  = 0x00;  r5  = 0x00;  r6  = 0x05;  r7  = 0x0F;
  89.          r8  = 0xFF;  bout( 9, 0x3CE, 0x3CF );
  90.  
  91.          in(r63,0x3DA);                   /* reset attr F/F */
  92.  
  93.          r0  = 0x00;  r1  = 0x01;  r2  = 0x02;  r3  = 0x03; /* palette */
  94.          r4  = 0x04;  r5  = 0x05;  r6  = 0x14;  r7  = 0x07;
  95.          r8  = 0x38;  r9  = 0x39;  r10 = 0x3A;  r11 = 0x3B;
  96.          r12 = 0x3C;  r13 = 0x3D;  r14 = 0x3E;  r15 = 0x3F;
  97.  
  98.          r16 = 0x01;  r17 = 0x00;  r18 = 0x0F;  r19 = 0x00; /* attr cntlr */
  99.          bout(20,0x3C0,0x3C0);
  100.  
  101.          out(0x3C0,0x20);                 /* enable palette */
  102.          }
  103.  
  104.  
  105.       PROCEDURE SetText
  106.          {
  107.          in(r63,0x3DA);                   /* reset attr F/F */
  108.          out(0x3C0,0);                    /* disable palette */
  109.  
  110.          r0 = 0x01;  r1 = 0x00;  r2 = 0x03;  r3 = 0x00;  r4 = 0x02;
  111.          bout(5,0x3C4,0x3C5);          /* sequencer regs */
  112.  
  113.          out(0x3C2,0x67);                 /* misc out reg   */
  114.          r0=0x03; bout(1,0x3C4,0x3C5);    /* sequencer enable */
  115.  
  116.          out(0x3D4,0x11); out(0x3D5,0);   /* unprotect crtc regs 0-7 */
  117.          r0  = 0x5F;  r1  = 0x4F;  r2  = 0x50;  r3  = 0x82; /* crtc */
  118.          r4  = 0x55;  r5  = 0x81;  r6  = 0xBF;  r7  = 0x1F;
  119.          r8  = 0x00;  r9  = 0x4F;  r10 = 0x0D;  r11 = 0x0E;
  120.          r12 = 0x00;  r13 = 0x00;  r14 = 0x00;  r15 = 0x00;
  121.          r16 = 0x9C;  r17 = 0x8E;  r18 = 0x8F;  r19 = 0x28;
  122.          r20 = 0x1F;  r21 = 0x96;  r22 = 0xB9;  r23 = 0xA3;
  123.          r24 = 0xFF;  bout(25,0x3D4,0x3D5);
  124.  
  125.          out(0x3CC,0x00); out(0x3CA,0x01); /* graphics controller */
  126.          r0  = 0x00;  r1  = 0x00;  r2  = 0x00;  r3  = 0x00;
  127.          r4  = 0x00;  r5  = 0x10;  r6  = 0x0E;  r7  = 0x00;
  128.          r8  = 0xFF;  bout(9,0x3CE,0x3CF);
  129.  
  130.          in(r63,0x3DA);                   /* reset attr F/F */
  131.  
  132.          r0  = 0x00;  r1  = 0x01;  r2  = 0x02;  r3  = 0x03; /* palette    */
  133.          r4  = 0x04;  r5  = 0x05;  r6  = 0x14;  r7  = 0x07;
  134.          r8  = 0x38;  r9  = 0x39;  r10 = 0x3A;  r11 = 0x3B;
  135.          r12 = 0x3C;  r13 = 0x3D;  r14 = 0x3E;  r15 = 0x3F;
  136.          r16 = 0x0C;  r17 = 0x00;  r18 = 0x0F;  r19 = 0x08; /* attr cntlr */
  137.          bout(20,0x3C0,0x3C0);
  138.  
  139.          out(0x3C0,0x20);                 /* enable palette */
  140.          }
  141.  
  142.  
  143. /* ********************************************************************* */
  144.  
  145. VENDOR ATI         "ATI"
  146.  MODEL  WONDER     "VGA WONDER"
  147.   CLASS  VGA       "STD VGA"
  148.    MODE   640x480-16  "640x480 16-color"     /* STD VGA 640x480 16-color */
  149.  
  150.       MEMORY(0xA0000,0x10000);        /* Basee Address, Length       */
  151.       PORT(0x3C2,0x3CA,0x3CC,0x3DA);  /* General/External registers  */
  152.       PORT(0x3C0,0x3C1);              /* Attribute                   */
  153.       PORT(0x3C7,0x3C8,0x3C9);        /* Color registers             */
  154.       PORT(0x3C4,0x3C5);              /* Sequencer                   */
  155.       PORT(0x3CE,0x3CF);              /* Graphics                    */
  156.       PORT(0x3D4,0x3D5);              /* CRTC                        */
  157.  
  158.       DATA
  159.          {
  160.      XDRIVER     = "mw";
  161.      VISUAL      = "PseudoColor";
  162.      DEPTH       = 4;
  163.          DEVTYPE     = 01;
  164.          DEVTECH     = 0x0D;            /* VGA */
  165.          PIXBYTES    = 80;
  166.          PIXWIDTH    = 640;
  167.          PIXHEIGHT   = 480;
  168.          PIXRESX     = 68;
  169.          PIXRESY     = 68;
  170.          PIXBITS     = 1;
  171.          PIXPLANES   = 4;
  172.          MAPTYPE     = "EGA";
  173.          BASEADDRESS = 0xA0000;
  174.          INTERLEAVE  = 1;
  175.          INTERSIZE   = 80;
  176.          }
  177.  
  178.       PROCEDURE SetGraphics
  179.          {
  180.          in(r63,0x3DA);                   /* reset attr F/F  */
  181.          out(0x3C0,0);                    /* disable palette */
  182.  
  183.          r0 = 1;  r1 = 1;  r2 = 0x0F;  r3 = 0;  r4 = 6;
  184.          bout(5,0x3C4,0x3C5);             /* reset, sequencer regs */
  185.  
  186.          out(0x3C2,0xE3);                 /* misc out reg */
  187.          r0=3;  bout(1,0x3C4,0x3C5);      /* sequencer enable */
  188.  
  189.          out(0x3D4,0x11); out(0x3D5,0);   /* unprotect crtc regs 0-7 */
  190.          r0  = 0x5F;  r1  = 0x4F;  r2  = 0x50;  r3  = 0x82; /* crtc */
  191.          r4  = 0x54;  r5  = 0x80;  r6  = 0x0B;  r7  = 0x3E;
  192.          r8  = 0x00;  r9  = 0x40;  r10 = 0x00;  r11 = 0x00;
  193.          r12 = 0x00;  r13 = 0x00;  r14 = 0x00;  r15 = 0x00;
  194.          r16 = 0xEA;  r17 = 0x8C;  r18 = 0xDF;  r19 = 0x28;
  195.          r20 = 0x00;  r21 = 0xE7;  r22 = 0x04;  r23 = 0xE3;
  196.          r24 = 0xFF;  bout(25,0x3D4,0x3D5);
  197.  
  198.  
  199.          out(0x3CC,0x00); out(0x3CA,0x01); /* graphics controller */
  200.          r0  = 0x00;  r1  = 0x00;  r2  = 0x00;  r3  = 0x00;
  201.          r4  = 0x00;  r5  = 0x00;  r6  = 0x05;  r7  = 0x0F;
  202.          r8  = 0xFF;  bout( 9, 0x3CE, 0x3CF );
  203.  
  204.          in(r63,0x3DA);                   /* reset attribute Flip/Flop */
  205.  
  206.          r0  = 0x00;  r1  = 0x01;  r2  = 0x02;  r3  = 0x03; /* palette */
  207.          r4  = 0x04;  r5  = 0x05;  r6  = 0x14;  r7  = 0x07;
  208.          r8  = 0x38;  r9  = 0x39;  r10 = 0x3A;  r11 = 0x3B;
  209.          r12 = 0x3C;  r13 = 0x3D;  r14 = 0x3E;  r15 = 0x3F;
  210.  
  211.          r16 = 0x01;  r17 = 0x00;  r18 = 0x0F;  r19 = 0x00; /* attr cntlr */
  212.          bout(20,0x3C0,0x3C0);
  213.  
  214.          out(0x3C0,0x20);                 /* enable palette */
  215.          }
  216.  
  217.  
  218.       PROCEDURE SetText
  219.          {
  220.          in(r63,0x3DA);                   /* reset attribute Flip/Flop */
  221.          out(0x3C0,0);                    /* disable palette */
  222.  
  223.          r0 = 0x01;  r1 = 0x00;  r2 = 0x03;  r3 = 0x00;  r4 = 0x02;
  224.          bout(5,0x3C4,0x3C5);          /* sequencer regs */
  225.  
  226.          out(0x3C2,0x67);                 /* misc out reg   */
  227.          r0=0x03; bout(1,0x3C4,0x3C5);    /* sequencer enable */
  228.  
  229.          out(0x3D4,0x11); out(0x3D5,0);   /* unprotect crtc regs 0-7 */
  230.          r0  = 0x5F;  r1  = 0x4F;  r2  = 0x50;  r3  = 0x82; /* crtc */
  231.          r4  = 0x55;  r5  = 0x81;  r6  = 0xBF;  r7  = 0x1F;
  232.          r8  = 0x00;  r9  = 0x4F;  r10 = 0x0D;  r11 = 0x0E;
  233.          r12 = 0x00;  r13 = 0x00;  r14 = 0x00;  r15 = 0x00;
  234.          r16 = 0x9C;  r17 = 0x8E;  r18 = 0x8F;  r19 = 0x28;
  235.          r20 = 0x1F;  r21 = 0x96;  r22 = 0xB9;  r23 = 0xA3;
  236.          r24 = 0xFF;  bout(25,0x3D4,0x3D5);
  237.  
  238.          out(0x3CC,0x00); out(0x3CA,0x01); /* graphics controller */
  239.          r0  = 0x00;  r1  = 0x00;  r2  = 0x00;  r3  = 0x00;
  240.          r4  = 0x00;  r5  = 0x10;  r6  = 0x0E;  r7  = 0x00;
  241.          r8  = 0xFF;  bout(9,0x3CE,0x3CF);
  242.  
  243.          in(r63,0x3DA);                   /* reset attr F/F */
  244.  
  245.          r0  = 0x00;  r1  = 0x01;  r2  = 0x02;  r3  = 0x03; /* palette    */
  246.          r4  = 0x04;  r5  = 0x05;  r6  = 0x14;  r7  = 0x07;
  247.          r8  = 0x38;  r9  = 0x39;  r10 = 0x3A;  r11 = 0x3B;
  248.          r12 = 0x3C;  r13 = 0x3D;  r14 = 0x3E;  r15 = 0x3F;
  249.          r16 = 0x0C;  r17 = 0x00;  r18 = 0x0F;  r19 = 0x08; /* attr cntlr */
  250.          bout(20,0x3C0,0x3C0);
  251.  
  252.          out(0x3C0,0x20);                 /* enable palette */
  253.          }
  254.  
  255.  
  256. /*
  257.  * NOTE!! This entry is for an ATI VGA Wonder with a
  258.  * rev 2 chip set using clock chip. 
  259.  * The chip set revision level can be determined by
  260.  * examining the byte at offset 0x43 in the VGA BIOS (usually at
  261.  * address C000:0043) using DOS debug. This location contains the
  262.  * ATI chip set revision level as an ASCII digit - ie 0x32 for rev 2.
  263.  */
  264.  
  265. /* ********************************************************************* */
  266.  
  267. VENDOR ATI       "ATI"
  268.  MODEL  WONDER   "VGA WONDER"
  269.   CLASS  ATIVGA  "ATI VGA"
  270.    MODE   V5-800x600-16  "V5 800x600 16-color Rev 2  56HZ"
  271.  
  272.  
  273.       MEMORY(0xA0000,0x10000);        /* Base Address, Length        */
  274.       PORT(0x1CE,0x1CF);              /* ATI extended register       */
  275.       PORT(0x3C2,0x3CA,0x3CC,0x3DA);  /* General/External registers  */
  276.       PORT(0x3C0,0x3C1);              /* Attribute                   */
  277.       PORT(0x3C7,0x3C8,0x3C9);        /* Color registers             */
  278.       PORT(0x3C4,0x3C5);              /* Sequencer                   */
  279.       PORT(0x3CE,0x3CF);              /* Graphics                    */
  280.       PORT(0x3D4,0x3D5);              /* CRTC                        */
  281.  
  282.       DATA
  283.         {
  284.      XDRIVER     = "mw";
  285.      VISUAL      = "PseudoColor";
  286.      DEPTH       = 4;
  287.         DEVTYPE     = 01;
  288.         DEVTECH     = 0x0D;    /* VGA */
  289.         PIXBYTES    = 100;
  290.         PIXWIDTH    = 800;
  291.         PIXHEIGHT   = 600;
  292.         PIXRESX     = 64;
  293.         PIXRESY     = 54;
  294.         PIXBITS     = 1;
  295.         PIXPLANES   = 4;
  296.          MAPTYPE     = "EGA";
  297.         BASEADDRESS = 0xA0000;
  298.         INTERLEAVE  = 1;
  299.         INTERSIZE   = 80;
  300.     }
  301.  
  302.     PROCEDURE     SetGraphics             /* ATI mode 0x54 */
  303.         {
  304.         /* sequencer */
  305.         r0 = 0x1;   /* reset */
  306.         r1 = 0x1;
  307.         r2 = 0xF;
  308.         r3 = 0x0;
  309.         r4 = 0x86;
  310.         bout(5, 0x3C4, 0x3C5);
  311.  
  312.  
  313.         /* set ATI extended registers to mode 54h V5  */
  314.  
  315.         /* ATI Reg 0 = XX00000X */
  316.         out(0x1CE, 0xB0);  in(r63, 0x1CF); and(r63, 0xC1);
  317.         out(0x1CE, 0xB0); out(0x1CF, r63);
  318.         /* ATI Reg 1 = X0000XXX */
  319.         out(0x1CE, 0xB1);  in(r63, 0x1CF); and(r63, 0x87);
  320.         out(0x1CE, 0xB1); out(0x1CF, r63);
  321.         /* ATI Reg 3 = XXX1XXXX */
  322.         out(0x1CE, 0xB3);  in(r63, 0x1CF); and(r63, 0xbf); or(r63, 0x10);
  323.         out(0x1CE, 0xB3); out(0x1CF, r63);
  324.         /* ATI Reg 5 = 0XXXXXXX */
  325.         out(0x1CE, 0xB5);  in(r63, 0x1CF); and(r63, 0x7f);
  326.         out(0x1CE, 0xB5); out(0x1CF, r63);
  327.         /* ATI Reg 6 = XXX00XXX */
  328.         out(0x1CE, 0xB6);  in(r63, 0x1CF); and(r63, 0xe7);
  329.         out(0x1CE, 0xB6); out(0x1CF, r63);
  330.         /* ATI Reg 8 = 01XXXXXX */
  331.         out(0x1CE, 0xB8);  in(r63, 0x1CF); and(r63, 0x3f);
  332.         out(0x1CE, 0xB8); out(0x1CF, r63);
  333.         /* ATI Reg E = XXXXXX0X */
  334.         out(0x1CE, 0xBE);  in(r63, 0x1CF); and(r63, 0xF5); or( r63, 0x10);
  335.         out(0x1CE, 0xBE); out(0x1CF, r63);
  336.         /* ATI Reg 9 = XXXXXX0X */
  337.         out(0x1CE, 0xB9);  in(r63, 0x1CF); and(r63, 0xFD);
  338.         out(0x1CE, 0xB9); out(0x1CF, r63);
  339.  
  340.         out(0x3C2,0xEF);  
  341.  
  342.         /* remove sequencer reset */
  343.         r0 = 0x3;
  344.         bout(1,0x3C4,0x3C5);
  345.  
  346.         /* unprotect crtc regs 0-7 */
  347.         out(0x3D4, 0x11);  out(0x3D5, 0x0E);
  348.  
  349.         /* crtc */
  350.         r0  = 0x7A; r1  = 0x63; r2  = 0x65; r3  = 0x9D;
  351.         r4  = 0x67; r5  = 0x92; r6  = 0x38; r7  = 0x1F;
  352.         r8  = 0;    r9  = 0;    r10 = 0;    r11 = 0;
  353.         r12 = 0;    r13 = 0;    r14 = 0;    r15 = 0;
  354.         r16 = 0x2D; r17 = 0x8E; r18 = 0x2B; r19 = 0x32;
  355.         r20 = 0xF;  r21 = 0x32; r22 = 0x34; r23 = 0xE7;
  356.         r24 = 0xFF;
  357.         bout( 25, 0x3d4, 0x3D5 );
  358.  
  359.         /* attribute controller */
  360.         in(r63,0x3DA);   /* reset f/f */
  361.  
  362.         /* palette */
  363.         r0  = 00;       r1  = 01;       r2  = 02;       r3  = 03;
  364.         r4  = 04;       r5  = 05;       r6  = 0x14;     r7  = 07;
  365.         r8  = 0x38;     r9  = 0x39;     r10 = 0x3A;     r11 = 0x3B;
  366.         r12 = 0x3C;     r13 = 0x3D;     r14 = 0x3E;     r15 = 0x3F;
  367.         /* attribute controller */
  368.         r16 = 01;       r17 = 00;       r18 = 0x0F;     r19 = 00;
  369.         r20 = 0;
  370.         bout( 21, 0x3C0, 0x3C0 );
  371.  
  372.         /* enable palette */
  373.         out( 0x3C0, 0x20);
  374.  
  375.         /* graphics controller */
  376.         r0 = 0x0;
  377.         r1 = 0x0;
  378.         r2 = 0x0;
  379.         r3 = 0x0;
  380.         r4 = 0x0;
  381.         r5 = 0x0;
  382.         r6 = 0x5;
  383.         r7 = 0xF;
  384.         r8 = 0xFF;
  385.         bout( 9, 0x3CE, 0x3CF );
  386.  
  387.         }
  388.  
  389.     PROCEDURE SetText
  390.          {
  391.  
  392.          r0 = 0x01;  r1 = 0x00;  r2 = 0x03;  r3 = 0x00;  r4 = 0x02;
  393.          bout(5,0x3C4,0x3C5);          /* sequencer regs */
  394.  
  395.         /* set ATI extended registers to initial state V5 */
  396.  
  397.         /* ATI Reg 0 = XX00000X */
  398.         out(0x1CE, 0xB0);  in(r63, 0x1CF); and(r63, 0xC1);
  399.         out(0x1CE, 0xB0); out(0x1CF, r63);
  400.         /* ATI Reg 1 = X0000XXX */
  401.         out(0x1CE, 0xB1);  in(r63, 0x1CF); and(r63, 0x87);
  402.         out(0x1CE, 0xB1); out(0x1CF, r63);
  403.         /* ATI Reg 3 = XXX1XXXX */
  404.         out(0x1CE, 0xB3);  in(r63, 0x1CF); and(r63, 0xbf); or(r63, 0x10);
  405.         out(0x1CE, 0xB3); out(0x1CF, r63);
  406.         /* ATI Reg 5 = 0XXXXXXX */
  407.         out(0x1CE, 0xB5);  in(r63, 0x1CF); and(r63, 0x7f);
  408.         out(0x1CE, 0xB5); out(0x1CF, r63);
  409.         /* ATI Reg 6 = XXX00XXX */
  410.         out(0x1CE, 0xB6);  in(r63, 0x1CF); and(r63, 0xe7);
  411.         out(0x1CE, 0xB6); out(0x1CF, r63);
  412.         /* ATI Reg 8 = 01XXXXXX */
  413.         out(0x1CE, 0xB8);  in(r63, 0x1CF); and(r63, 0x7f);  or(r63, 0x40);
  414.         out(0x1CE, 0xB8); out(0x1CF, r63);
  415.         /* ATI Reg E = XXXXXX0X */
  416.         out(0x1CE, 0xBE);  in(r63, 0x1CF); and(r63, 0xF5); or( r63, 0x10);
  417.         out(0x1CE, 0xBE); out(0x1CF, r63);
  418.         /* ATI Reg 9 = XXXXXX0X */
  419.         out(0x1CE, 0xB9);  in(r63, 0x1CF); and(r63, 0xFD); or( r63, 0x02);
  420.         out(0x1CE, 0xB9); out(0x1CF, r63);
  421.  
  422.          out(0x3C2,0x67);                 /* misc out reg   */
  423.  
  424.          r0=0x03; bout(1,0x3C4,0x3C5);    /* sequencer enable */
  425.  
  426.          /* unprotect crtc regs 0-7 */
  427.          out(0x3D4, 0x11);  out(0x3D5, 0x0E);
  428.  
  429.          r0  = 0x5F;  r1  = 0x4F;  r2  = 0x50;  r3  = 0x82; /* crtc */
  430.          r4  = 0x55;  r5  = 0x81;  r6  = 0xBF;  r7  = 0x1F;
  431.          r8  = 0x00;  r9  = 0x4F;  r10 = 0x0D;  r11 = 0x0E;
  432.          r12 = 0x00;  r13 = 0x00;  r14 = 0x00;  r15 = 0x00;
  433.          r16 = 0x9C;  r17 = 0x8E;  r18 = 0x8F;  r19 = 0x28;
  434.          r20 = 0x0F;  r21 = 0x96;  r22 = 0xB9;  r23 = 0xA3;
  435.          r24 = 0xFF;  bout(25,0x3D4,0x3D5);
  436.  
  437.          in(r63,0x3DA);                   /* reset attr F/F */
  438.  
  439.          r0  = 0x00;  r1  = 0x01;  r2  = 0x02;  r3  = 0x03; /* palette    */
  440.          r4  = 0x04;  r5  = 0x05;  r6  = 0x14;  r7  = 0x07;
  441.          r8  = 0x38;  r9  = 0x39;  r10 = 0x3A;  r11 = 0x3B;
  442.          r12 = 0x3C;  r13 = 0x3D;  r14 = 0x3E;  r15 = 0x3F;
  443.          r16 = 0x0C;  r17 = 0x00;  r18 = 0x0F;  r19 = 0x08; /* attr cntlr */
  444.          bout(20,0x3C0,0x3C0);
  445.  
  446.          out(0x3C0,0x20);                 /* enable palette */
  447.  
  448.          out(0x3CC,0x00); out(0x3CA,0x01); /* graphics controller */
  449.          r0  = 0x00;  r1  = 0x00;  r2  = 0x00;  r3  = 0x00;
  450.          r4  = 0x00;  r5  = 0x10;  r6  = 0x0E;  r7  = 0x00;
  451.          r8  = 0xFF;  bout(9,0x3CE,0x3CF);
  452.  
  453.          }
  454.  
  455. /*
  456.  * NOTE!! This entry is for an ATI VGA Wonder with a
  457.  * rev 2 chip set using 4 crystals. 
  458.  * The chip set revision level can be determined by
  459.  * examining the byte at offset 0x43 in the VGA BIOS (usually at
  460.  * address C000:0043) using DOS debug. This location contains the
  461.  * ATI chip set revision level as an ASCII digit - ie 0x32 for rev 2.
  462.  */
  463.  
  464. /* ********************************************************************* */
  465.  
  466. VENDOR ATI       "ATI"
  467.  MODEL  WONDER   "VGA WONDER"
  468.   CLASS  ATIVGA  "ATI VGA"
  469.    MODE   V4-800x600-16  "V4 800x600 16-color Rev 2  56HZ"
  470.  
  471.  
  472.       MEMORY(0xA0000,0x10000);        /* Base Address, Length        */
  473.       PORT(0x1CE,0x1CF);              /* ATI extended register       */
  474.       PORT(0x3C2,0x3CA,0x3CC,0x3DA);  /* General/External registers  */
  475.       PORT(0x3C0,0x3C1);              /* Attribute                   */
  476.       PORT(0x3C7,0x3C8,0x3C9);        /* Color registers             */
  477.       PORT(0x3C4,0x3C5);              /* Sequencer                   */
  478.       PORT(0x3CE,0x3CF);              /* Graphics                    */
  479.       PORT(0x3D4,0x3D5);              /* CRTC                        */
  480.  
  481.       DATA
  482.         {
  483.      XDRIVER     = "mw";
  484.      VISUAL      = "PseudoColor";
  485.      DEPTH       = 4;
  486.         DEVTYPE     = 01;
  487.         DEVTECH     = 0x0D;    /* VGA */
  488.         PIXBYTES    = 100;
  489.         PIXWIDTH    = 800;
  490.         PIXHEIGHT   = 600;
  491.         PIXRESX     = 64;
  492.         PIXRESY     = 54;
  493.         PIXBITS     = 1;
  494.         PIXPLANES   = 4;
  495.          MAPTYPE     = "EGA";
  496.         BASEADDRESS = 0xA0000;
  497.         INTERLEAVE  = 1;
  498.         INTERSIZE   = 80;
  499.     }
  500.  
  501.     PROCEDURE   SetGraphics             /* ATI mode 0x54 */
  502.         {
  503.  
  504.         /* sequencer */
  505.         r0 = 0x1;   /* reset */
  506.         r1 = 0x1;
  507.         r2 = 0xF;
  508.         r3 = 0x0;
  509.         r4 = 0x86;
  510.         bout(5, 0x3C4, 0x3C5);
  511.  
  512.         /* set ATI extended registers to mode 54h V4  */
  513.  
  514.         /* ATI Reg 0 = XX00000X */
  515.         out(0x1CE, 0xB0);  in(r63, 0x1CF); and(r63, 0xC1);
  516.         out(0x1CE, 0xB0); out(0x1CF, r63);
  517.         /* ATI Reg 1 = X0000XXX */
  518.         out(0x1CE, 0xB1);  in(r63, 0x1CF); and(r63, 0x87);
  519.         out(0x1CE, 0xB1); out(0x1CF, r63);
  520.         /* ATI Reg 3 = XXX1XXXX */
  521.         out(0x1CE, 0xB3);  in(r63, 0x1CF); and(r63, 0xBF); or(r63, 0x10);
  522.         out(0x1CE, 0xB3); out(0x1CF, r63);
  523.         /* ATI Reg 5 = 0XXXXXXX */
  524.         out(0x1CE, 0xB5);  in(r63, 0x1CF); and(r63, 0x7f);
  525.         out(0x1CE, 0xB5); out(0x1CF, r63);
  526.         /* ATI Reg 6 = XXX00XXX */
  527.         out(0x1CE, 0xB6);  in(r63, 0x1CF); and(r63, 0xe7);
  528.         out(0x1CE, 0xB6); out(0x1CF, r63);
  529.         /* ATI Reg 8 = 01XXXXXX */
  530.         out(0x1CE, 0xB8);  in(r63, 0x1CF); and(r63, 0x3f);
  531.         out(0x1CE, 0xB8); out(0x1CF, r63);
  532.         /* ATI Reg E = XXXXXX0X */
  533.         out(0x1CE, 0xBE);  in(r63, 0x1CF); and(r63, 0xE5); or(r63, 0x10);
  534.         out(0x1CE, 0xBE); out(0x1CF, r63);
  535.  
  536.         out(0x3C2,0xEF);  
  537.  
  538.         /* remove sequencer reset */
  539.         r0 = 0x3;
  540.         bout(1,0x3C4,0x3C5);
  541.  
  542.         /* unprotect crtc regs 0-7 */
  543.         out(0x3D4, 0x11);  out(0x3D5, 0x0E);
  544.  
  545.         /* crtc */
  546.         r0  = 0x7A; r1  = 0x63; r2  = 0x65; r3  = 0x9D;
  547.         r4  = 0x67; r5  = 0x92; r6  = 0x38; r7  = 0x1F;
  548.         r8  = 0;    r9  = 0;    r10 = 0;    r11 = 0;
  549.         r12 = 0;    r13 = 0;    r14 = 0;    r15 = 0;
  550.         r16 = 0x2D; r17 = 0x8E; r18 = 0x2B; r19 = 0x32;
  551.         r20 = 0xF;  r21 = 0x32; r22 = 0x34; r23 = 0xE7;
  552.         r24 = 0xFF;
  553.         bout( 25, 0x3d4, 0x3D5 );
  554.  
  555.         /* attribute controller */
  556.         in(r63,0x3DA);   /* reset f/f */
  557.  
  558.         /* palette */
  559.         r0  = 00;       r1  = 01;       r2  = 02;       r3  = 03;
  560.         r4  = 04;       r5  = 05;       r6  = 0x14;     r7  = 07;
  561.         r8  = 0x38;     r9  = 0x39;     r10 = 0x3A;     r11 = 0x3B;
  562.         r12 = 0x3C;     r13 = 0x3D;     r14 = 0x3E;     r15 = 0x3F;
  563.         /* attribute controller */
  564.         r16 = 01;       r17 = 00;       r18 = 0x0F;     r19 = 00;
  565.         r20 = 0;
  566.         bout( 21, 0x3C0, 0x3C0 );
  567.  
  568.         /* enable palette */
  569.         out( 0x3C0, 0x20);
  570.  
  571.         /* graphics controller */
  572.         r0 = 0x0;
  573.         r1 = 0x0;
  574.         r2 = 0x0;
  575.         r3 = 0x0;
  576.         r4 = 0x0;
  577.         r5 = 0x0;
  578.         r6 = 0x5;
  579.         r7 = 0xF;
  580.         r8 = 0xFF;
  581.         bout( 9, 0x3CE, 0x3CF );
  582.  
  583.         }
  584.  
  585.     PROCEDURE SetText
  586.          {
  587.  
  588.          r0 = 0x01;  r1 = 0x00;  r2 = 0x03;  r3 = 0x00;  r4 = 0x02;
  589.          bout(5,0x3C4,0x3C5);         /* sequencer regs */
  590.  
  591.         /* set ATI extended registers to initial state V4 */
  592.  
  593.         /* ATI Reg 0 = XX00000X */
  594.         out(0x1CE, 0xB0);  in(r63, 0x1CF); and(r63, 0xC1);
  595.         out(0x1CE, 0xB0); out(0x1CF, r63);
  596.         /* ATI Reg 1 = X0000XXX */
  597.         out(0x1CE, 0xB1);  in(r63, 0x1CF); and(r63, 0x87);
  598.         out(0x1CE, 0xB1); out(0x1CF, r63);
  599.         /* ATI Reg 3 = XXX1XXXX */
  600.         out(0x1CE, 0xB3);  in(r63, 0x1CF);  and(r63, 0xbf); or(r63, 0x10);
  601.         out(0x1CE, 0xB3); out(0x1CF, r63);
  602.         /* ATI Reg 5 = 0XXXXXXX */
  603.         out(0x1CE, 0xB5);  in(r63, 0x1CF); and(r63, 0x7f);
  604.         out(0x1CE, 0xB5); out(0x1CF, r63);
  605.         /* ATI Reg 6 = XXX00XXX */
  606.         out(0x1CE, 0xB6);  in(r63, 0x1CF); and(r63, 0xe7);
  607.         out(0x1CE, 0xB6); out(0x1CF, r63);
  608.         /* ATI Reg 8 = 01XXXXXX */
  609.         out(0x1CE, 0xB8);  in(r63, 0x1CF); and(r63, 0x7f);  or(r63, 0x40);
  610.         out(0x1CE, 0xB8); out(0x1CF, r63);
  611.         /* ATI Reg E = XXXXXX0X */
  612.         out(0x1CE, 0xBE);  in(r63, 0x1CF); and(r63, 0xE5);
  613.         out(0x1CE, 0xBE); out(0x1CF, r63);
  614.  
  615.          out(0x3C2,0x67);                 /* misc out reg   */
  616.  
  617.          r0=0x03; bout(1,0x3C4,0x3C5);    /* sequencer enable */
  618.  
  619.          /* unprotect crtc regs 0-7 */
  620.          out(0x3D4, 0x11);  out(0x3D5, 0x0E);
  621.  
  622.          r0  = 0x5F;  r1  = 0x4F;  r2  = 0x50;  r3  = 0x82; /* crtc */
  623.          r4  = 0x55;  r5  = 0x81;  r6  = 0xBF;  r7  = 0x1F;
  624.          r8  = 0x00;  r9  = 0x4F;  r10 = 0x0D;  r11 = 0x0E;
  625.          r12 = 0x00;  r13 = 0x00;  r14 = 0x00;  r15 = 0x00;
  626.          r16 = 0x9C;  r17 = 0x8E;  r18 = 0x8F;  r19 = 0x28;
  627.          r20 = 0x0F;  r21 = 0x96;  r22 = 0xB9;  r23 = 0xA3;
  628.          r24 = 0xFF;  bout(25,0x3D4,0x3D5);
  629.  
  630.          in(r63,0x3DA);                   /* reset attr F/F */
  631.  
  632.          r0  = 0x00;  r1  = 0x01;  r2  = 0x02;  r3  = 0x03; /* palette    */
  633.          r4  = 0x04;  r5  = 0x05;  r6  = 0x14;  r7  = 0x07;
  634.          r8  = 0x38;  r9  = 0x39;  r10 = 0x3A;  r11 = 0x3B;
  635.          r12 = 0x3C;  r13 = 0x3D;  r14 = 0x3E;  r15 = 0x3F;
  636.          r16 = 0x0C;  r17 = 0x00;  r18 = 0x0F;  r19 = 0x08; /* attr cntlr */
  637.          bout(20,0x3C0,0x3C0);
  638.  
  639.          out(0x3C0,0x20);                 /* enable palette */
  640.  
  641.          out(0x3CC,0x00); out(0x3CA,0x01); /* graphics controller */
  642.          r0  = 0x00;  r1  = 0x00;  r2  = 0x00;  r3  = 0x00;
  643.          r4  = 0x00;  r5  = 0x10;  r6  = 0x0E;  r7  = 0x00;
  644.          r8  = 0xFF;  bout(9,0x3CE,0x3CF);
  645.  
  646.          }
  647.  
  648. /*
  649.  * NOTE!! This entry is for an ATI VGAWONDER with a
  650.  * rev 1 chip set. The chip set revision level can be determined by
  651.  * examining the byte at offset 0x43 in the VGA BIOS (usually at
  652.  * address C000:0043) using DOS debug. This location contains the
  653.  * ATI chip set revision level as an ASCII digit - ie 0x31 for rev 1.
  654.  */
  655.  
  656.  
  657. /* ********************************************************************* */
  658.  
  659. VENDOR ATI       "ATI"
  660.  MODEL  WONDER   "VGA WONDER"
  661.   CLASS  ATIVGA  "ATI VGA"
  662.    MODE   V3-800x600-16  "V3 800x600 16-color Rev 1  56HZ"
  663.  
  664.       MEMORY(0xA0000,0x10000);        /* Base Address, Length        */
  665.       PORT(0x1CE,0x1CF);              /* ATI extended register       */
  666.       PORT(0x3C2,0x3CA,0x3CC,0x3DA);  /* General/External registers  */
  667.       PORT(0x3C0,0x3C1);              /* Attribute                   */
  668.       PORT(0x3C7,0x3C8,0x3C9);        /* Color registers             */
  669.       PORT(0x3C4,0x3C5);              /* Sequencer                   */
  670.       PORT(0x3CE,0x3CF);              /* Graphics                    */
  671.       PORT(0x3D4,0x3D5);              /* CRTC                        */
  672.  
  673.       DATA
  674.         {
  675.      XDRIVER     = "mw";
  676.      VISUAL      = "PseudoColor";
  677.      DEPTH       = 4;
  678.         DEVTYPE     = 01;
  679.         DEVTECH     = 0x0D;    /* VGA */
  680.         PIXBYTES    = 100;
  681.         PIXWIDTH    = 800;
  682.         PIXHEIGHT   = 600;
  683.         PIXRESX     = 64;
  684.         PIXRESY     = 54;
  685.         PIXBITS     = 1;
  686.         PIXPLANES   = 4;
  687.          MAPTYPE     = "EGA";
  688.         BASEADDRESS = 0xA0000;
  689.         INTERLEAVE  = 1;
  690.         INTERSIZE   = 80;
  691.     }
  692.  
  693.     PROCEDURE   SetGraphics             /* ATI mode 0x54 */
  694.         {
  695.  
  696.         /* sequencer */
  697.         r0 = 0x1;   /* reset */
  698.         r1 = 0x1;
  699.         r2 = 0xF;
  700.         r3 = 0x0;
  701.         r4 = 0x86;
  702.         bout(5, 0x3C4, 0x3C5);
  703.         /* set ATI extended registers to mode 54h V3 */
  704.  
  705.         /* ATI Reg 0 = XX00000X */
  706.         out(0x1CE, 0xB0);  in(r63, 0x1CF); and(r63, 0xC1); or(r63, 0x08);
  707.         out(0x1CE, 0xB0); out(0x1CF, r63);
  708.         /* ATI Reg 1 = X0000XXX */
  709.         out(0x1CE, 0xB1);  in(r63, 0x1CF); and(r63, 0x87);
  710.         out(0x1CE, 0xB1); out(0x1CF, r63);
  711.         /* ATI Reg 2 = X1XXXXX0 */
  712.         out(0x1CE, 0xB2);  in(r63, 0x1CF); and(r63, 0xFE); or(r63, 0x40);
  713.         out(0x1CE, 0xB2); out(0x1CF, r63);
  714.         /* ATI Reg 5 = 0XXXXXXX */
  715.         out(0x1CE, 0xB5);  in(r63, 0x1CF); and(r63, 0x7f);
  716.         out(0x1CE, 0xB5); out(0x1CF, r63);
  717.         /* ATI Reg 6 = XXX00XXX */
  718.         out(0x1CE, 0xB6);  in(r63, 0x1CF); and(r63, 0xe7);
  719.         out(0x1CE, 0xB6); out(0x1CF, r63);
  720.         /* ATI Reg 8 = 01XXXXXX */
  721.         out(0x1CE, 0xB8);  in(r63, 0x1CF); and(r63, 0x3f);
  722.         out(0x1CE, 0xB8); out(0x1CF, r63);
  723.  
  724.  
  725.         /* misc output reg */
  726.         out(0x3C2,0xEF);  
  727.  
  728.         /* remove sequencer reset */
  729.         r0 = 0x3;
  730.         bout(1,0x3C4,0x3C5);
  731.  
  732.         /* unprotect crtc regs 0-7 */
  733.         out(0x3D4, 0x11);  out(0x3D5, 0x0E);
  734.  
  735.         /* crtc */
  736.         r0  = 0x7A; r1  = 0x63; r2  = 0x65; r3  = 0x9D;
  737.         r4  = 0x67; r5  = 0x92; r6  = 0x38; r7  = 0x1F;
  738.         r8  = 0;    r9  = 0;    r10 = 0;    r11 = 0;
  739.         r12 = 0;    r13 = 0;    r14 = 0;    r15 = 0;
  740.         r16 = 0x2D; r17 = 0x8E; r18 = 0x2B; r19 = 0x32;
  741.         r20 = 0xF;  r21 = 0x32; r22 = 0x34; r23 = 0xE7;
  742.         r24 = 0xFF;
  743.         bout( 25, 0x3d4, 0x3D5 );
  744.  
  745.         /* attribute controller */
  746.         in(r63,0x3DA);   /* reset f/f */
  747.  
  748.         /* palette */
  749.         r0  = 00;       r1  = 01;       r2  = 02;       r3  = 03;
  750.         r4  = 04;       r5  = 05;       r6  = 0x14;     r7  = 07;
  751.         r8  = 0x38;     r9  = 0x39;     r10 = 0x3A;     r11 = 0x3B;
  752.         r12 = 0x3C;     r13 = 0x3D;     r14 = 0x3E;     r15 = 0x3F;
  753.         /* attribute controller */
  754.         r16 = 01;       r17 = 00;       r18 = 0x0F;     r19 = 00;
  755.         r20 = 0;
  756.         bout( 21, 0x3C0, 0x3C0 );
  757.  
  758.         /* enable palette */
  759.         out( 0x3C0, 0x20);
  760.  
  761.         /* graphics controller */
  762.         r0 = 0x0;
  763.         r1 = 0x0;
  764.         r2 = 0x0;
  765.         r3 = 0x0;
  766.         r4 = 0x0;
  767.         r5 = 0x0;
  768.         r6 = 0x5;
  769.         r7 = 0xF;
  770.         r8 = 0xFF;
  771.         bout( 9, 0x3CE, 0x3CF );
  772.  
  773.         }
  774.  
  775.     PROCEDURE SetText
  776.          {
  777.  
  778.          r0 = 0x01;  r1 = 0x00;  r2 = 0x03;  r3 = 0x00;  r4 = 0x02;
  779.          bout(5,0x3C4,0x3C5);          /* sequencer regs */
  780.  
  781.         /* set ATI extended registers to initial state V3 */
  782.  
  783.         /* ATI Reg 0 = XX00000X */
  784.         out(0x1CE, 0xB0);  in(r63, 0x1CF); and(r63, 0xC1);
  785.         out(0x1CE, 0xB0); out(0x1CF, r63);
  786.         /* ATI Reg 1 = X0000XXX */
  787.         out(0x1CE, 0xB1);  in(r63, 0x1CF); and(r63, 0x87);
  788.         out(0x1CE, 0xB1); out(0x1CF, r63);
  789.         /* ATI Reg 2 = X0XXXXX0 */
  790.         out(0x1CE, 0xB2);  in(r63, 0x1CF); and(r63, 0xBE);
  791.         out(0x1CE, 0xB2); out(0x1CF, r63);
  792.         /* ATI Reg 5 = 0XXXXXXX */
  793.         out(0x1CE, 0xB5);  in(r63, 0x1CF); and(r63, 0x7f);
  794.         out(0x1CE, 0xB5); out(0x1CF, r63);
  795.         /* ATI Reg 6 = XXX00XXX */
  796.         out(0x1CE, 0xB6);  in(r63, 0x1CF); and(r63, 0xe7);
  797.         out(0x1CE, 0xB6); out(0x1CF, r63);
  798.         /* ATI Reg 8 = 01XXXXXX */
  799.         out(0x1CE, 0xB8);  in(r63, 0x1CF); and(r63, 0x7f);  or(r63, 0x40);
  800.         out(0x1CE, 0xB8); out(0x1CF, r63);
  801.  
  802.          out(0x3C2,0x67);                 /* misc out reg   */
  803.  
  804.          r0=0x03; bout(1,0x3C4,0x3C5);    /* sequencer enable */
  805.  
  806.          /* unprotect crtc regs 0-7 */
  807.          out(0x3D4, 0x11);  out(0x3D5, 0x0E);
  808.  
  809.          r0  = 0x5F;  r1  = 0x4F;  r2  = 0x50;  r3  = 0x82; /* crtc */
  810.          r4  = 0x55;  r5  = 0x81;  r6  = 0xBF;  r7  = 0x1F;
  811.          r8  = 0x00;  r9  = 0x4F;  r10 = 0x0D;  r11 = 0x0E;
  812.          r12 = 0x00;  r13 = 0x00;  r14 = 0x00;  r15 = 0x00;
  813.          r16 = 0x9C;  r17 = 0x8E;  r18 = 0x8F;  r19 = 0x28;
  814.          r20 = 0x0F;  r21 = 0x96;  r22 = 0xB9;  r23 = 0xA3;
  815.          r24 = 0xFF;  bout(25,0x3D4,0x3D5);
  816.  
  817.          in(r63,0x3DA);                   /* reset attr F/F */
  818.  
  819.          r0  = 0x00;  r1  = 0x01;  r2  = 0x02;  r3  = 0x03; /* palette    */
  820.          r4  = 0x04;  r5  = 0x05;  r6  = 0x14;  r7  = 0x07;
  821.          r8  = 0x38;  r9  = 0x39;  r10 = 0x3A;  r11 = 0x3B;
  822.          r12 = 0x3C;  r13 = 0x3D;  r14 = 0x3E;  r15 = 0x3F;
  823.          r16 = 0x0C;  r17 = 0x00;  r18 = 0x0F;  r19 = 0x08; /* attr cntlr */
  824.          bout(20,0x3C0,0x3C0);
  825.  
  826.          out(0x3C0,0x20);                 /* enable palette */
  827.  
  828.          out(0x3CC,0x00); out(0x3CA,0x01); /* graphics controller */
  829.          r0  = 0x00;  r1  = 0x00;  r2  = 0x00;  r3  = 0x00;
  830.          r4  = 0x00;  r5  = 0x10;  r6  = 0x0E;  r7  = 0x00;
  831.          r8  = 0xFF;  bout(9,0x3CE,0x3CF);
  832.  
  833.          }
  834. /* End of File - ATI-WONDER.XGI */
  835.